70 GHz Large-signal Bandwidth Sampler Using Current-mode Integrate-and-Hold Circuit for ADC Frontend
In modern digital communication systems and broadband measurement equipment, high speed broadband analog-to-digital converters (ADCs) are key components. Ultrabroadband ADCs use time-interleaved sampling which makes it possible to achieve very high sampling rates above 100 GS/s. In such ADCs the analog input bandwidth is limited by the samplers and the linearity of the samplers also typically limits the linearity of the ADC. The IHC (Integrate-and-Hold Circuit) sampling method combines high bandwidth with excellent linearity. This chip, based on a current-mode IHC, provides a 70 GHz 1dB large-signal bandwidth and 41 dBc SFDR at 9.9 GHz, with the added ability to tune its bandwidth. This sampler currently holds the record for the highest large-signal bandwidth compared to any other sampler published to date.
Area: 1.0mm x 0.9mm
Technology: 130nm SiGe:C BiCMOS IHP (G2)
Refences
L. Wu and J. C. Scheytt, "Analysis and Design of a Charge Sampler With 70-GHz 1-dB Bandwidth in 130-nm SiGe BiCMOS," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 9, pp. 3668-3681, Sept. 2021.
L. Wu, M. Weizel and J. C. Scheytt, "70 GHz Large-signal Bandwidth Sampler Using Current-mode Integrate-and-Hold Circuit in 130 nm SiGe BiCMOS Technology," 2019 IEEE Asia-Pacific Microwave Conference (APMC), Singapore, 2019, pp. 1697-1699.