Event no:

L.048.24020

Event type:

Lecture V2, Exercise Ü2

Credit points:

3

Time mode:

Winter term

Time and place:

For information on the venue and time of the event, please refer to PAUL

Brief description

The lecture introduces design of phase-locked loops (PLL) at system level and transistor level. Amplitude noise and phase noise of signals are modeled and discussed in PLL building blocks. Different PLL architectures such as integer-N and fractional-N PLLs are covered.

Contents:

•  Chapter 1: Motivation
  • Time and frequency definition
    • definition in SI units
    • static frequency error
  • Random fluctuations
    • Amplitude/Phase (AM/PM) noise
    •  
• Chapter 2: Mathematical formalism of signals
  • Baseband and bandpass signals
  • Time and frequency domain
     
• Chapter 3: introduction to random processes
  • Baseband random processes and noise
    • correlation functions in time and frequency domain
    • some basedband random processes (thermal noise, shot noise, flicker noise ...)
  • Bandpass random processes
    • correlation functions
    • relation to baseband processes
    • phase noise and amplitude noise
       
• Chapter 4: PLL building blocks
  • Phase detector
    • Phase detector model
    • phase noise of phase detector
  • VCO
    • VCO model
    • phase noise of VCO
  • Frequency translators
    • frequency divider
    • frequency multiplier
    • phase noise of frequency translators
  • Transistor level design of PLL blocks
     
• Chapter 5: Integer N PLLs:
  • Time domain
  • Frequency domain
  • Phase noise
  • Spurious frequencies 
     
• Chapter 6: Fractional PLLs
  • Time domain
  • Frequency domain
  • Phase noise
  • Spurious frequencies

Literature:

•  A. Bruce Carlson, Paul B. Crilly, “Communication systems : an introduction to signals and noise in electrical communication”, 5^th edition
• Behzad Razavi, “RF microelectronics”, 2nd edition