VLSI-Test­ing

Event no:

L.048.25005/ L.048.92027

Event type:

Lecture V2 + Exercises Ü2

Credit points:

6

Semester: 

Summer term

Schedule & Location:

For information on the venue and time of the event, please refer to PAUL

Brief description

The course “VLSI Testing” focuses on techniques for detecting hardware defects in micro-electronic circuits. Algorithms for test data generation and test response evaluation as well as hardware structures for design for test (DFT) and on-chip test implementation (BIST) are presented.

Contents:

  • Fault models
  • Testability measures and design for test (DFT)
  • Logic and fault simulation
  • Automatic test pattern generation (ATPG)
  • Built-in self-test (BIST), in particular test data compression and test response compaction
  • Memory test

Prerequisites:

  • Digital Design

Teaching Staff:

M.Sc. Lars Luchterhandt, Prof. Wolfgang Müller

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