Dr.-Ing. Markus Köster


Dr.-Ing. Markus Köster

Markus Köster war Kollegiat in der Fachgruppe Schaltungstechnik.

Adresse
Fachgruppe Schaltungstechnik
Heinz Nixdorf Institut
Universität Paderborn
Fürstenallee 11
33102 Paderborn
e-Mail:Markus.Koester@hni.uni-paderborn.de
Telefon:+49 5251 60-6354
Fax:+49 5251 60-6351
Raum:F0.431





Publikationen:
Korf, S., Cozzi, D., Koester, M., Hagemeyer, J., Porrmann, M., Rückert, U. & Santambrogio, M.D.:
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs,
In: Proceedings of the 19th IEEE International Symposium on Field-Programmable Custom Computing Machines, May 1-3, 2011, pp. 125-132, IEEE Computer Society, 2011.
Koester, M., Luk, W., Hagemeyer, J., Porrmann, M. & Rückert, U.:
Design Optimizations for Tiled Partially Reconfigurable Systems,
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, June, 2011, Vol. 19(6), pp. 1048-1061.
Sterpone, L., Margaglia, F., Koester, M., Hagemeyer, J. & Porrmann, M.:
Analysis of SEU Effects in Partially Reconfigurable SoPCs,
In: Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011), June 6-9, 2011, IEEE Computer Society, 2011.
Becker, T., Koester, M. & Luk, W.:
Automated placement of reconfigurable regions for relocatable modules,
In: Proceedings of the IEEE International Symposium on Circuits and Systems, May 30 - June 2, 2010, pp. 3341-3344, IEEE Circuits and Systems Society, 2010.
Dittmann, F., Linke, M., Hagemeyer, J., Koester, M., Lallet, J., Pohl, C., Porrmann, M., Harris, J. & Ilstad, J.:
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks,
In: Proceedings of the International SpaceWire Conference 2010, June 22-24, 2010, pp. 193-196, Space Technology Centre - University of Dundee, 2010.
Koester, M., Luk, W., Hagemeyer, J. & Porrmann, M.:
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules,
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009) New York, NY, USA, April 20-24, 2009, ACM Press, 2009.
Koester, M., Luk, W. & Brown, G.:
A Hardware Compilation Flow for Instance-Specific VLIW Cores,
In: Proceedings of the International Conference on Field Programmable Logic and Applications 2008, September 8-10, 2008, pp. 619-622, IEEE Computer Society, 2008.
Hagemeyer, J., Kettelhoit, B., Koester, M. & Porrmann, M.:
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs,
In: Proceedings of the Internation Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '07), June 25-28, 2007, pp. 238-247, CSREA Press, 2007.
Hagemeyer, J., Kettelhoit, B., Koester, M. & Porrmann, M.:
INDRA - Integrated Design Flow for Reconfigurable Architectures,
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) - University Booth, April 16-20, 2007, ACM Press, 2007.
Hagemeyer, J., Kettelhoit, B., Koester, M. & Porrmann, M.:
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs,
In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL '07), August 27-29, 2007, pp. 331-338, IEEE Computer Society, 2007.
Koester, M., Kalte, H., Porrmann, M. & Rückert, U.:
Defragmentation Algorithms for Partially Reconfigurable Hardware,
IFIP International Federation for Information Processing Series,
In: VLSI-SOC: From Systems To Silicon, Vol. 240, pp. 41-53, Springer Boston, 2007.
Koester, M.:
Analyse und Entwurf von Methoden zur Ressourcenverwaltung partiell rekonfigurierbarer Architekturen. School: University of Paderborn, Germany, 2007.
Rana, V., Santambrogio, M., Sciuto, D., Kettelhoit, B., Koester, M., Porrmann, M. & Rückert, U.:
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux,
In: Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2007.
Koester, M., Kalte, H. & Porrmann, M.:
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems,
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '06) Las Vegas, USA, June 27-30, 2006, CSREA Press, 2006.
Kalte, H., Kettelhoit, B., Koester, M., Porrmann, M. & Rückert, U.:
A System Approach for Partially Reconfigurable Architectures,
International Journal of Embedded Systems, Vol. 1, pp. 274-290, Inderscience Publishers, 2005.
Koester, M., Kalte, H. & Porrmann, M.:
Run-Time Defragmentation for Partially Reconfigurable Systems,
In: Proceedings of the International Conference on Very Large Scale Integration of System-on-Chip (IFIP VLSI-SoC), October 17-19, 2005, pp. 109-115.
Koester, M., Kalte, H. & Porrmann, M.:
Task Placement for Heterogeneous Reconfigurable Architectures,
In: Proceedings of the IEEE 2005 Conference on Field-Programmable Technology (FPT'05) Singapore, December 11-14, 2005, pp. 43-50, IEEE Computer Society, 2005.
Koester, M.:
Efficient Utilization of Partially Reconfigurable Hardware,
In: Proceedings of the International Conference on Very Large Scale Integration of System-on-Chip (IFIP VLSI-SoC), October 17-19, 2005, pp. 597-598.
Koester, M., Porrmann, M. & Rückert, U.:
Placement-Oriented Modeling of Partially Reconfigurable Architectures,
In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2005.
Kalte, H., Koester, M., Kettelhoit, B., Porrmann, M. & Rückert, U.:
A Comparative Study on System Approaches for Partially Reconfigurable Architectures,
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '04), pp. 70-76, CSREA Press, 2004.
Koester, M., Grauel, A. & Convey, H.:
Optimisation by Clonal Selection Principles,
In: Recent Advances in Intelligent Systems and Signal Processing, pp. 301-306, WSEAS Press, 2003.
Koester, M., Grauel, A. & Convey, H.:
A Novel Unsupervised Machine Learning Algorithm,
In: Proceedings of the 9th International Conference on Soft Computing (MENDEL 2003), pp. 108-113.
Koester, M., Grauel, A., Klene, G. & Convey, H.:
A New Paradigm of Optimisation by Using Artificial Immune Reactions,
In: 7th International Conference on Knowledge-Based Intelligent Information and Engineering Systems (KES 2003), Part I, Vol. 2773, pp. 287-292, Springer, 2003.
Koester, M. & Teich, J.:
(Self-)reconfigurable Finite State Machines: Theory and Implementation,
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2002), pp. 559-566, IEEE Computer Society Press, 2002.