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Brinkmann, André:

Analyse und Entwurf eines Stream Caches für einen 6805 Mikroprozessor Cache.

Studienarbeit, Schaltungstechnik, Heinz Nixdorf Institut, Universität Paderborn, June 1997

Abstract

The bottle-neck of modern computer systems is the memory access. Due to the increasing gap between the main memory access time and the cycle time of modern microprocessors, main memory is not able to deliver data with sufficient latency and bandwidth. To improve the memory access time and to increase the memory bandwidth, state-of-the-art computer systems use a fast and expensive cache-memory between the processor and the main memory. Actual cache-strategies need much fast memory to increase the performance of the computer system. The “stream-cache“-strategy, presented in this work, has a new prefetch-mechanism, able to improve the performance of the system with little memory.

Bibtex

@mastersthesis{hniid=1010,
author = {Brinkmann, André},
title = {Analyse und Entwurf eines Stream Caches f{\"u}r einen 6805 Mikroprozessor Cache},
type = {Studienarbeit},
school = {Schaltungstechnik, Heinz Nixdorf Institut, Universit{\"a}t Paderborn},
month = jun,
year = {1997},
}

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https://www.hni.uni-paderborn.de/pub/1010