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Kalte, Heiko; Porrmann, Mario; Rückert, Ulrich: System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement. In: 11th Reconfigurable Architectures Workshop (RAW 2004), Santa Fé, New Mexico, USA, 26 - 27 Apr 2004

Abstract

The increasing logic density of current FPGAs (Field Programmable Gate Arrays) enables the integration of whole systems on one programmable chip. Some of these FPGAs provide the additional feature of partial dynamic reconfiguration, which permits to change parts of the de-vice while other parts keep working. Combining the fea-tures of system level density and partial dynamic recon-figuration enables the integration of dynamic systems that can be adopted to changing demands during runtime. A lot of theoretical work in this challenging research area has been done on efficiently placing and scheduling modules on the FPGA area. However, there is a lack of applied approaches that can be realized by existing tools and FPGAs. In this paper we present a new, realizable ap-proach for the dynamic system integration on Xilinx Virtex FPGAs. In contrast to the existing approaches that con-sider fixed slots for the module placement, our approach enables the fine-grained placement of modules with vari-able width along a horizontal communication infrastruc-ture.

Bibtex

@inproceedings{hniid=1649,
author = {Kalte, Heiko and Porrmann, Mario and Rückert, Ulrich},
title = {System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement},
booktitle = {11th Reconfigurable Architectures Workshop (RAW 2004), Santa Fé, New Mexico, USA},
month = {26~-~27~} # apr,
year = {2004},
}